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GMDSS: Element 3

Question 192 of 605

Given the combined DC input voltages, what would the output voltage be in the circuit shown in Figure 3D7?

USCG illustration 3D7 for GMDSS Element 3 question 192 — Illustration 3D7

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More Element 3 questions

#190 In a direct digital synthesizer, what are the unwanted components on its output?
#191 What is the definition of a phase-locked loop (PLL) circuit?
#193 Which lamps would be lit in the circuit shown in Figure 3D8?
#194 What will occur if an amplifier input signal coupling capacitor fails open?
#195 In Figure 3D9, determine if there is a problem with this regulated power supply and identify the problem.

3D7

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